UVM Electrical Engineer with Security Clearance

Duration: 6 Months assignment with possible extension.

• Resolves complex issues on critical programs related to architectural approaches, requirements, specifications and design. Leads technical aspect of proposal preparation. Identifies critical performance measures and develops processes for computing them. Leads activities in support of Supplier Management with make/buy recommendations and other technical services. Coordinates engineering support throughout the lifecycle of the product. Develops new concepts for future product designs to meet projected requirements. Recommends and manages technology insertion. Works under consultative direction. Required Skills
• Engineering-minded verification engineers, not simply engineers who write test cases.
• 7 or more years of verification 2+ UVM experience, though 5+ years is acceptable if UVM experience is solid.
• Strong SystemVerilog and UVM experience
• Self-checking and constrained-random verification; verification planning
• Debugging; coverage closure
• Active U.S. security clearance Education:
• Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 14 or more years' related work experience (e.g. PhD+9 years' related work experience, Master+12 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.