Principal FPGA Engineer with Security Clearance

• Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing analysis and closure, verification, and system integration
• RTL coding and simulation in VHDL or Verilog
• Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
• RTL coding and simulation in VHDL or Verilog OR Testbench development for the verification of RTL blocks using UVM and SystemVerilog
• Digital circuit architecture, design, resource tradeoffs, timing analysis and timing closure Required Qualifications: * Due to the nature of the work, U.S. Citizenship is REQUIRED. * Active Secret Security Clearance is REQUIRED.
• A bachelor's or master"s degree in Electrical Engineering, Computer Engineering, or equivalent work experience.
• Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog)
• ASIC / FPGA lab validation with advanced lab equipment
• Design for Test (DFT) and manufacturability issues
• Experience with Unix, scripting, C/C++, and/or Perl
• Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g. Modelsim, Synopsys, FPGA-specific tools)
• Familiarity with revision control concepts and tools (e.g. Subversion)
• Ability to work with minimal supervision, part of a team of engineers with a variety of skills and backgrounds
• Strong oral and written communication skills and the ability to document and present one's work and status We provide a competitive pay and benefits package. This position is offering a salary range of $190K to $240K. Belcan considers several factors when extending an offer, including but not limited to education, experience, geographic location, and discipline. Benefits offered may include health care, dental, vision, life insurance, 401(k), education assistance, paid time off, including PTO, holidays, and any other paid leave required by law.

www.belcan.com