FPGA/ASIC Design Engineer with Security Clearance
Indotronix International Corp Herndon
Job Title: FPGA/ASIC Design Engineer
Location: Herndon, VA
Duration: 12 Months
L3Harris has state-of-the-art EDA flows/methodologies including Mentor EDA: Simulator Questa Prime, Verification IP (QVIPs), UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero/Quartus).
We are a learning organization and have the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This is a high impact role in the organization to ensure robust quality and delivery of communication products for National Security.
Essential Functions: Derive FPGA design specifications from system requirements
Develop detailed FPGA architecture for implementation
Implement design in RTL (VHDL) and perform module level simulations
Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA)
Support Board, FPGA bring up
Experience with Revision control system
Experience with Earned Value Management (EVM)
Good written, verbal, and presentation skills
Active DoD Security Clearance Preferred Additional Skills: Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Location: Herndon, VA
Duration: 12 Months
Pay: $115/hr on W2
Active Secret Clearance Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key design team, responsible for the delivery of FPGAs for defense applications. S/he will architect, implement FPGA design, with hands on design/debug with primarily Ethernet, I2C, SPI, AXI protocols.L3Harris has state-of-the-art EDA flows/methodologies including Mentor EDA: Simulator Questa Prime, Verification IP (QVIPs), UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero/Quartus).
We are a learning organization and have the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This is a high impact role in the organization to ensure robust quality and delivery of communication products for National Security.
Essential Functions: Derive FPGA design specifications from system requirements
Develop detailed FPGA architecture for implementation
Implement design in RTL (VHDL) and perform module level simulations
Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA)
Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA
Generate verification test plans and perform End to End SimulationsSupport Board, FPGA bring up
Validate design through HW/SW integration test with test equipment
Support product collateral for NSA certification Qualifications: Bachelor of Science (BS) -Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)- 5+ years’ experience designing FPGA products with VHDL
Experience with Revision control system
Experience with Earned Value Management (EVM)
Good written, verbal, and presentation skills
Active DoD Security Clearance Preferred Additional Skills: Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OSExperience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult
Mauck Research Group, LLCHerndon (VA)
with a TS/SCI security clearance to join our dynamic team. As an Android Cyber Tool Developer, you will play a crucial role in researching and developing cutting-edge security tools for the Android platform. This is a fantastic opportunity for an innovative...
Anonymous EmployerHerndon (VA)
software (CVS, SVN, Git, GitLab, GitLab CI)
• Management, development of DevOps deployment automation processes
• Security+ Certification
• TS/SCI with CI Poly security clearance required to start Duties And Responsibilities • Deploy through Red Hat (RH)...
DCI SolutionsHerndon (VA)
supporting and maintaining Splunk environments Experience with the following: Splunk ITSI
KPIs
RMF
Incident Response
Required Certifications: Splunk Core Consultant
Splunk ITSI
Required: Active TS/SCI with Full-Scope Polygraph Security Clearance Job Type...