Physical Design Jobs in San Francisco
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Search Results - Physical Design Jobs in San Francisco
Amazon-San Francisco
as leaders in our excellent Physical Design team, adopting super advanced process nodes, mentoring team members, and further developing our implementation methodologies.
To learn more about Annapurna Labs, you're welcome to watch the following video from...
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Oho Group Ltd-San Francisco
and ASIC execution. Role emphasizes SoC integration with UCIe die-to-die interfaces, HBM subsystems, and custom compute cores.
Responsibilities include RTL design, IP configuration and integration, synthesis, and collaboration with physical design teams...
OpenAI-San Francisco
performance, power, and efficiency breakthroughs across all layers of the stack.
About the Role
We are seeking a highly skilled Silicon Implementation Engineer with deep expertise in physical design and methodology. This individual contributor role sits...
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Acceler8 Talent-San Francisco
including progress toward area and timing closure, design freeze, and tapeout
• Partner closely with Verification, DFT, and Physical Design teams to achieve best-in-class Performance, Power, and Area (PPA)
• Support structured handoff and collaboration...
Amazon-San Francisco
A leading technology firm in San Francisco is looking for electrical engineering graduates to join its Physical Design team. This role offers a three-month training program focusing on backend development and hands-on experience with innovative...
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Amazon-San Francisco
Lead industrial design strategy for Amazon's Personal Robotics Group, shaping the future of human-robot hardware experiences. Drive design excellence at the intersection of AI and physical robotics, creating next-generation products that seamlessly...
amazon.jobs -
Recooty-San Francisco
Synapse Design has an exciting opportunity for a Physical Design Engineer to help lead our growing Physical Design Engineering team. We are looking for an experienced engineer.
• Seniority Level - Mid-Senior level
• Industry - Semiconductors...
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Amazon-San Francisco
A leading technology company in San Francisco is seeking experienced professionals for its Physical Design team. The role involves responsibility for the entire chip design process, from floorplanning to power analysis, mentoring team members...
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Renesas Electronics Corporation-San Francisco
A leading semiconductor solutions provider in San Francisco is seeking an experienced semiconductor design engineer. This key role involves physical layout design, developing platform architecture, and collaborating with teams to deliver projects...
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Renesas Electronics Corporation-San Francisco
Job Description
• Physical layout design including Synthesis, Place & Route, Physical verification, Static Timing Check, Power Verification, AC implementation, ...
• Design and develop the overall architecture of the platform
• Ensure...
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Oho Group Ltd-San Francisco
Role emphasizes SoC integration with UCIe die-to-die interfaces, HBM subsystems, and custom compute cores.
Responsibilities include RTL design, IP configuration and integration, synthesis, and collaboration with physical design teams for timing closure...
Acceler8 Talent-San Francisco
progress toward area and timing closure, design freeze, and tapeout
• Partner closely with Verification, DFT, and Physical Design teams to achieve best-in-class Performance, Power, and Area (PPA)
• Support structured handoff and collaboration across...
OpenAI-San Francisco
A leading AI research organization based in San Francisco is looking for a Silicon Implementation Engineer to develop and optimize physical design strategies for next-generation AI accelerators. The ideal candidate will collaborate with RTL...
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Cisco Systems-San Francisco
to system and processor architecture, high-speed logic design and verification, digital signal processing, memory and custom library development, physical design, DFT, signal integrity, and advanced packaging. Work with the latest VLSI techniques and deep...
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Renesas Electronics Corporation-San Francisco
with P&R for digital hand-off and post layout verification.
Collaboration with analog engineers and test engineers on analog testability design and debugging.
Work closely with Application/GUI team in FPGA prototype and lab debugging.
Perform physical...
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